H:	ELECTRICITY
H03:	BASIC ELECTRONIC CIRCUITRY
H03M:	CODING; DECODING; CODE CONVERSION IN GENERAL
H03M1/00:	Analogue/digital conversion; Digital/analogue conversion
H03M1/00A:	. Analogue/digital/analogue conversion
H03M1/00P:	. with means for saving power
H03M1/00R:	. Reconfigurable analogue/digital or digital/analogue converters H03M1/02 takes precedence
H03M1/00R2:	. . [N: among different converters types]
H03M1/00R4:	. . [N: among different resolutions]
H03M1/00R6:	. . among different conversion characteristics, e.g. between mu-255 and a-laws
H03M1/12L:	. . Means for adapting the input signal to the range the converter can handle, e.g. limiting; Out-of-range indication (H03M1/18 takes precedence)[N9902][C0211]
H03M1/12L2:	. . . Clamping, i.e. adjusting the DC level of the input signal to a predetermined value[N0211]
H03M1/02:	. Reversible analogue/digital converters
H03M1/30Q4:	. . . . . . . for increasing resolution, e.g. by interpolation[N9902]
H03M1/36J:	. . . . with interpolation (H03M1/36S takes precedence)[N9902]
H03M1/36S2:	. . . . . the folding characteristic being provided by amplifiers preceding the comparators[N9912]
H03M1/36S2J:	. . . . . . with interpolation[N9912]
H03M1/04:	. using stochastic techniques
H03M1/50T:	. . . Time-to-digital converters[N9902]
H03M1/06:	. Continuously compensating for, or preventing, undesired influence of physical parameters
H03M1/06C:	. . of deviations from the desired transfer characteristic H03M1/06M takes precedence
H03M1/06C1:	. . . at one point, i.e. by adjusting a single reference value, e.g. bias or gain error gain setting for range control H03M1/18
H03M1/06C1Z:	. . . . Offset or drift compensation removal of offset already present on the analogue input signal H03M1/12S4C
H03M1/06C2:	. . . at two points of the transfer characteristic, i.e. by adjusting two reference values, e.g. offset and gain error
H03M1/06C3:	. . . over the full range of the converter, e.g. for correcting differential non-linearity
H03M1/06D:	. . of harmonic distortion H03M1/06M takes precedence
H03M1/06F:	. . by filtering[N0408]
H03M1/06F2:	. . . Anti-aliasing[N0408]
H03M1/06F4:	. . . Smoothing[N0408]
H03M1/06M:	. . characterised by the use of methods or means not specific to a particular type of detrimental influence
H03M1/06M1:	. . . by dividing out the errors, i.e. using a ratiometric arrangement
H03M1/06M1A:	. . . . with auxiliary conversion of a value corresponding to the physical parameter(s) to be compensated for
H03M1/06M3:	. . . by synchronisation
H03M1/06M5:	. . . by filtering
H03M1/06M5A:	. . . . Anti-aliasing
H03M1/06M5S:	. . . . Smoothing
H03M1/06M7:	. . . by averaging out the errors, e.g. using sliding scale
H03M1/06M7A:	. . . . in the amplitude domain
H03M1/06M7A1:	. . . . . using dither for increasing resolution H03M1/20D
H03M1/06M7A1R:	. . . . . . the dither being a random signal
H03M1/06M7S:	. . . . in the spatial domain
H03M1/06M7S1:	. . . . . by analogue redistribution among corresponding nodes of adjacent cells, e.g. using an impedance network connected among all comparator outputs in a flash converter
H03M1/06M7S3:	. . . . . by arranging the quantisation value generators in a non-sequential pattern layout, e.g. symmetrical
H03M1/06M7S5:	. . . . . by selecting the quantisation value generators in a non-sequential order, e.g. symmetrical
H03M1/06M7S5M:	. . . . . . the order being based on measuring the error
H03M1/06M7T:	. . . . in the time domain
H03M1/06M7T1:	. . . . . by calculating a running average of a number of subsequent samples
H03M1/06M7T3:	. . . . . by continuously permuting the elements used, i.e. dynamic element matching
H03M1/06M7T3C:	. . . . . . using clocked averaging
H03M1/06M7T3D:	. . . . . . using data dependent selection of the elements, e.g. data weighted averaging
H03M1/06M7T3D1:	. . . . . . . the selection being based on the output of noise shaping circuits for each element
H03M1/06M7T3M:	. . . . . . using different permutation circuits for different parts of the digital signal
H03M1/06M7T3R:	. . . . . . using random selection of the elements (with data-controlled random generator 1/06M7T3D)
H03M1/06M9:	. . . using redundancy
H03M1/06M9D:	. . . . using additional components or elements, e.g. dummy components
H03M1/06M9D2:	. . . . . the original and additional components or elements being complementary to each other, e.g. CMOS
H03M1/06M9D2N:	. . . . . . using a differential network structure, i.e. symmetrical with respect to ground
H03M1/06M9D2P:	. . . . . . using real and complementary patterns
H03M1/06M9F:	. . . . using fault-tolerant coding, e.g. parity check, error correcting codes (1/06M9R takes precedence)
H03M1/06M9R:	. . . . by range overlap between successive stages or steps
H03M1/06M9R1:	. . . . . using a diminished radix representation, e.g. radix 1.95
H03M1/06M9R3:	. . . . . using less than the maximum number of output states per stage, e.g. 1.5 bit per stage type
H03M1/06M9T:	. . . . in time, e.g. using additional comparison cycles
H03M1/06P:	. . in pattern-reading type converters, e.g. anti-ambiguity arrangements[N9902]
H03M1/06Q:	. . by dividing out the errors, i.e. using a ratiometric arrangement[N0211]
H03M1/06Q2:	. . . with auxiliary conversion of a value corresponding to the physical parameter(s) to be compensated for[N0211]
H03M1/06R:	. . using redundancy, e.g. dummy components[N9902][C0111]
H03M1/06R1:	. . . by range overlap between successive stages or steps[N9912]
H03M1/06R1B:	. . . . using a diminished radix representation, e.g. radix 1.95[N0111]
H03M1/06R1S:	. . . . using less than the maximum number of output states per stage, e.g. 1.5 bit per stage type[N0111]
H03M1/06R2:	. . . using a differential network structure, i.e. symmetrical with respect to ground[N9912]
H03M1/06R3:	. . . using fault-tolerant coding, e.g. parity check, error correcting codes (1/06R1 takes precedence)[N0111][C0211]
H03M1/06R4:	. . . in time, e.g. using additional comparison cycles[N0310]
H03M1/06S:	. . by synchronisation[N0408]
H03M1/06V:	. . Averaging out the errors, e.g. using sliding scale[N9902]
H03M1/06V2:	. . . by permutation in the time domain, i.e. dynamic element matching[N9902][C0310]
H03M1/06V2C:	. . . . using clocked averaging[N0310]
H03M1/06V2D:	. . . . using data dependent selection of the elements, e.g. data weighted averaging[N0201]
H03M1/06V2M:	. . . . using different permutation circuits for different parts of the digital signal[N0310]
H03M1/06V2R:	. . . . using random selection of the elements (with data-controlled random generator 1/06V2D)[N0201][C0211]
H03M1/06V4:	. . . by arranging or selecting the quantisation value generators in a special layout, e.g. symmetrical[N9902]
H03M1/06V6:	. . . using dither (for increasing resolution H03M1/20D)[N9902][C0408]
H03M1/06V8:	. . . by analog redistribution among corresponding nodes of adjacent cells, e.g. using an impedance netwerk connected among all comparator outputs in a flash converter[N0506]
H03M1/08:	. . of noise H03M1/06M takes precedence
H03M1/08B:	. . . of bubble errors, i.e. irregularities in thermometer codes
H03M1/08C:	. . . of clock feed-through
H03M1/08E:	. . . of electromagnetic or electrostatic field noise, e.g. by shielding, by optical isolation
H03M1/08J:	. . . of phase error, e.g. jitter
H03M1/08P:	. . . of power supply variations, e.g. ripple
H03M1/08Q:	. . . of quantisation noise
H03M1/08T:	. . . of switching transients, e.g. glitches
H03M1/08T2:	. . . . by disabling changes in the output during the transitions, e.g. by holding or latching
H03M1/08T4:	. . . . by forcing a gradual change from one output level to the next, e.g. soft-start
H03M1/08W:	. . . of temperature variations
H03M1/10:	. Calibration or testing
H03M1/10A:	. . without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated H03M1/10C, H03M1/10T take precedence
H03M1/10C:	. . Calibration
H03M1/10C1:	. . . at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error gain setting for range control H03M1/18
H03M1/10C1M:	. . . . by storing a corrected or correction value in a digital look-up table
H03M1/10C1Z:	. . . . Offset correction H03M1/10C1M takes precedence; removal of offset already present on the analogue input signal H03M1/12S4C
H03M1/10C2:	. . . at two points of the transfer characteristic, i.e. by adjusting two reference values, e.g. offset and gain error gain setting for range control H03M1/18
H03M1/10C3:	. . . over the full range of the converter, e.g. for correcting differential non-linearity
H03M1/10C3M:	. . . . by storing corrected or correction values in one or more digital look-up tables H03M1/10C3T takes precedence
H03M1/10C3M2:	. . . . . the look-up table containing corrected values for replacing the original digital values H03M1/10C3M6 takes precedence
H03M1/10C3M4:	. . . . . using an auxiliary digital/analogue converter for adding the correction values to the analogue signal H03M1/10C3M6 takes precedence
H03M1/10C3M6:	. . . . . using two or more look-up tables each corresponding to a different type of error, e.g. for offset, gain error and non-linearity error respectively
H03M1/10C3T:	. . . . by trimming, i.e. by individually adjusting at least part of the quantisation value generators or stages to their nominal values
H03M1/10C3T2:	. . . . . using digitally programmable trimming circuits
H03M1/10M:	. . Mechanical or optical alignment
H03M1/10T:	. . Measuring or testing
H03M1/10T1:	. . . Detection or location of converter hardware failure, e.g. power supply failure, open or short circuit
H03M1/10T2:	. . . Converters having special provisions for facilitating access for testing purposes
H03M1/10T4:	. . . using domain transforms, e.g. Fast Fourier Transform
H03M1/10T5:	. . . for dc performance, i.e. static testing (1/10T4 takes precedence)
H03M1/10T6:	. . . for ac performance, i.e. dynamic testing (1/10T4 takes precedence)
H03M1/12:	. Analogue/digital converters
H03M1/12M:	. . Multiplexed conversion systems
H03M1/12M2:	. . . Interleaved, i.e. using multiple converters or converter parts for one channel
H03M1/12M2T:	. . . . using time-division multiplexing
H03M1/12M4:	. . . [N: Shared, i.e. using a single converter for multiple channels]
H03M1/12M4T:	. . . . using time-division multiplexing
H03M1/12M6:	. . . Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters
H03M1/12N:	. . Non-linear conversion not otherwise provided for in subgroups of H03M1/12
H03M1/12S:	. . Sampling or signal conditioning arrangements specially adapted for A/D converters S/H circuits G11C27/02; sample rate conversion H03H17/04C, H03H17/06C
H03M1/12S2:	. . . Details of sampling arrangements or methods
H03M1/12S2A:	. . . . Asynchronous operation
H03M1/12S2L:	. . . . Synchronisation of the sampling frequency or phase to the input frequency or phase
H03M1/12S2M:	. . . . Multi-rate systems, i.e. adaptive to different fixed sampling rates
H03M1/12S2N:	. . . . Non-uniform sampling
H03M1/12S2N2:	. . . . . at intervals varying with the rate of change of the input signal
H03M1/12S2N2E:	. . . . . . at extreme values only
H03M1/12S2N4:	. . . . . at random intervals, e.g. digital alias free signal processing [DASP ]
H03M1/12S2S:	. . . . Synchronous circular sampling, i.e. using undersampling of periodic input signals
H03M1/12S4:	. . . Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling H03M1/18 takes precedence; Out-of-range indication
H03M1/12S4C:	. . . . Clamping, i.e. adjusting the DC level of the input signal to a predetermined value
H03M1/14:	. . Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
H03M1/14F:	. . . in which at least one step is of the folding type; Folding stages therefore
H03M1/14M:	. . . the reference generators for the steps being arranged in a common two-dimensional array
H03M1/14P:	. . . in pattern-reading type converters, e.g. having both absolute and incremental tracks on one disc or strip H03M1/16 takes precedence
H03M1/14R:	. . . the steps being performed sequentially in a single stage, i.e. recirculation type H03M1/14F, H03M1/14P, H03M1/16 take precedence
H03M1/14S:	. . . the steps being performed sequentially in series-connected stages H03M1/14F, H03M1/14P, H03M1/16 take precedence
H03M1/14S2:	. . . . all stages being simultaneous converters
H03M1/14S2C:	. . . . . at least two of which share a common reference generator
H03M1/14S2C2:	. . . . . . the reference generator being arranged in a two-dimensional array
H03M1/16:	. . . with scale factor modification, i.e. by changing the amplification between the steps H03M1/14F takes precedence
H03M1/16P:	. . . . in pattern-reading type converters, e.g. with gearings
H03M1/16R:	. . . . the steps being performed sequentially in a single stage, i.e. recirculation type H03M1/16P takes precedence
H03M1/16S:	. . . . the steps being performed sequentially in series-connected stages H03M1/16P takes precedence
H03M1/16S2:	. . . . . in which two or more residues with respect to different reference levels in a stage are used as input signals for the next stage, i.e. multi-residue type
H03M1/16S4:	. . . . . all stages comprising simultaneous converters H03M1/16S2 takes precedence
H03M1/16S4S:	. . . . . . and delivering the same number of bits
H03M1/18:	. . Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
H03M1/18B:	. . . in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values
H03M1/18B2:	. . . . the feedback signal controlling the reference levels of the analogue/digital converter
H03M1/18B4:	. . . . the feedback signal controlling the gain of an amplifier or attenuator preceding the analogue/digital converter
H03M1/18B4M:	. . . . . the determination of the range being based on more than one digital output value, e.g. on a running average, a power estimation or the rate of change
H03M1/18F:	. . . in feedforward mode, i.e. by determining the range to be selected directly from the input signal
H03M1/18F2:	. . . . using an auxiliary analogue/digital converter
H03M1/18M:	. . . Multi-path, i.e. having a separate analogue/digital converter for each possible range
H03M1/20:	. . Increasing resolution using an n bit system to obtain n + m bits
H03M1/20D:	. . . by dithering
H03M1/20J:	. . . by interpolation
H03M1/20J2:	. . . . [N: using an analogue interpolation circuit]
H03M1/20J2V:	. . . . . [N: in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators]
H03M1/20J2V2:	. . . . . . [N: using resistor strings for redistribution of the original reference signals or signals derived therefrom]
H03M1/20J4:	. . . . [N: using a logic interpolation circuit]
H03M1/20J6:	. . . . [N: using a digital interpolation circuit]
H03M1/20P:	. . . by prediction
H03M1/22:	. . Pattern-reading type
H03M1/24:	. . . using relatively movable reader and disc or strip
H03M1/24C:	. . . . Constructional details of parts relevant to the encoding mechanism, e.g. pattern carriers, pattern sensors (for details of other parts, e.g. housings, casings or the like, see the relevant application subclasses of G01, H01)
H03M1/26:	. . . . with weighted coding, i.e. the weight given to a digit depends on the position of the digit within the block or code word, e.g. there is a given radix and the weights are powers of this radix
H03M1/28:	. . . . with non-weighted coding
H03M1/28C:	. . . . . of the pattern-shifting type, e.g. pseudo-random chain code
H03M1/28H:	. . . . . of the unit Hamming distance type, e.g. Gray code
H03M1/28V:	. . . . . using gradually changing slit width or pitch within one track; using plural tracks having slightly different pitches, e.g. of the Vernier or nonius type
H03M1/30:	. . . . . incremental
H03M1/30C:	. . . . . . Constructional details of parts relevant to the encoding mechanism, e.g. pattern carriers, pattern sensors (details of housings, casings or the like, see the relevant application subclasses of G01, H01)
H03M1/30Q:	. . . . . . Circuits or methods for processing the quadrature signals
H03M1/30Q2:	. . . . . . . for detecting the direction of movement
H03M1/30Q6:	. . . . . . . for waveshaping
H03M1/30R:	. . . . . . with additional pattern means for determining the absolute position, e.g. reference marks
H03M1/32:	. . . using cathode-ray tubes or analoguous two-dimensional deflection systems
H03M1/34:	. . Analogue value compared with reference values
H03M1/34R:	. . . for direct conversion to a residue number representation
H03M1/36:	. . . simultaneously only, i.e. parallel type thermometer to binary encoders H03M7/16T
H03M1/36A:	. . . . having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
H03M1/36A2:	. . . . . the reference values being generated by a resistive voltage divider
H03M1/36A2F:	. . . . . . the voltage divider taps being held in a floating state, e.g. by feeding the divider by current sources
H03M1/36A2S:	. . . . . . the voltage divider being a single resistor string
H03M1/36A4:	. . . . . using current mode circuits, i.e. circuits in which the information is represented by current values rather than by voltage values
H03M1/36N:	. . . . Non-linear conversion
H03M1/36S:	. . . . having a single comparator per bit, e.g. of the folding type
H03M1/38:	. . . sequentially only, e.g. successive approximation type
H03M1/40:	. . . . recirculation type
H03M1/40C:	. . . . . [N: using switched capacitors]
H03M1/40J:	. . . . . using current mode circuits, i.e. circuits in which the information is represented by current values rather than by voltage values
H03M1/42:	. . . . Sequential comparisons in series-connected stages with no change in value of analogue signal
H03M1/44:	. . . . Sequential comparisons in series-connected stages with change in value of analogue signal
H03M1/44C:	. . . . . using switched capacitors
H03M1/44F:	. . . . . the stages being of the folding type
H03M1/44J:	. . . . . using current mode circuits, i.e. circuits in which the information is represented by current values rather than by voltage values
H03M1/46:	. . . . with digital/analogue converter for supplying reference values to converter
H03M1/46C:	. . . . . Details of the control circuitry, e.g. of the successive approximation register
H03M1/46N:	. . . . . Non-linear conversion
H03M1/46S:	. . . . . using switched capacitors
H03M1/46S2:	. . . . . . in which the input S/H circuit is merged with the feedback DAC array
H03M1/48:	. . Servo-type converters
H03M1/48P:	. . . for position encoding, e.g. using resolvers or synchros
H03M1/50:	. . with intermediate conversion to time interval
H03M1/50D:	. . . using tapped delay lines
H03M1/50W:	. . . using pulse width modulation
H03M1/50W2:	. . . . [N: the pulse width modulator being of the charge-balancing type]
H03M1/50W4:	. . . . the pulse width modulator being of the self-oscillating type
H03M1/52:	. . . Input signal integrated with linear return to datum
H03M1/54:	. . . Input signal sampled and held with linear return to datum
H03M1/56:	. . . Input signal compared with linear ramp
H03M1/58:	. . . Non-linear conversion
H03M1/60:	. . with intermediate conversion to frequency of pulses
H03M1/62:	. . . Non-linear conversion
H03M1/64:	. . with intermediate conversion to phase of sinusoidal or similar periodical signals
H03M1/64P:	. . . for position encoding, e.g. using resolvers or synchros H03M1/48P takes precedence
H03M1/66:	. Digital/analogue converters
H03M1/66J:	. . Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal, e.g. by interpolation, by curve-fitting, by smoothing
H03M1/66M:	. . Multiplexed conversion systems
H03M1/66N:	. . Non-linear conversion not otherwise provided for in subgroups of H03M1/66
H03M1/66P:	. . with intermediate conversion to phase of sinusoidal or similar periodical signals
H03M1/66R:	. . Recirculation type
H03M1/66S:	. . Servo-type converters
H03M1/68:	. . with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
H03M1/68D:	. . . [N: both converters being of the unary decoded type]
H03M1/68D2:	. . . . [N: the quantisation value generators of both converters being arranged in a common two-dimensional array]
H03M1/68S:	. . . [N: Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type]
H03M1/70:	. . Automatic control for modifying converter range
H03M1/72:	. . Sequential conversion in series-connected stages
H03M1/74:	. . Simultaneous conversion
H03M1/74J:	. . . using current sources as quantisation value generators
H03M1/74J2:	. . . . with weighted currents
H03M1/74J4:	. . . . [N: with equal currents which are switched by unary decoded digital signals]
H03M1/76:	. . . using switching tree
H03M1/76S:	. . . . [N: using a single level of switches which are controlled by unary decoded digital signals]
H03M1/78:	. . . using ladder network
H03M1/78R:	. . . . using resistors, i.e. R-2R ladders
H03M1/80:	. . . using weighted impedances
H03M1/80C:	. . . . using capacitors, e.g. neuron-mos transistors, charge coupled devices
H03M1/80C2:	. . . . . with charge redistribution
H03M1/80C2S:	. . . . . . [N: with equally weighted capacitors which are switched by unary decoded digital signals]
H03M1/80R:	. . . . using resistors
H03M1/82:	. . with intermediate conversion to time interval
H03M1/82W:	. . . using pulse width modulation
H03M1/82W2:	. . . . by comparing the input signal with a digital ramp signal
H03M1/82W4:	. . . . in which the total pulse width is distributed over multiple shorter pulse widths
H03M1/84:	. . . Non-linear conversion
H03M1/86:	. . with intermediate conversion to frequency of pulses
H03M1/88:	. . . Non-linear conversion
H03M3/00:	Conversion of analogue values to or from differential modulation
H03M3/02:	. Delta modulation, i.e. one-bit differential modulation (H03M 3/30 takes precedence)
H03M3/022:	. . [N: with adaptable step size, i.e. adaptive delta modulation [ADM]]
H03M3/024:	. . . [N: using syllabic companding, e.g. continuously variable slope delta modulation [CVSD]]
H03M3/02B:	. . with adaptive feedback
H03M3/04:	. Differential modulation with several bits, e.g. differential pulse code modulation [DPCM] H03M3/30 takes precedence; voice coding G10L19/00; image coding H04N7/26
H03M3/042:	. . [N: with adaptable step size, e.g. adaptive differential pulse code modulation [ADPCM]]
H03M3/04B:	. . with adaptive feedback
H03M3/30:	. Delta-sigma modulation
H03M3/32:	. . [N: with special provisions or arrangements for power saving, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains, by selectively turning on stages when needed]
H03M3/322:	. . [N: Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, e.g. by using stored correction values, H03M3/378) ]
H03M3/324:	. . . [N: characterised by means or methods compensating or preventing more than one type of error at a time, e.g. by synchronisation, using a ratiometric arrangement]
H03M3/326:	. . . . [N: by averaging out the errors]
H03M3/328:	. . . . . [N: using dither]
H03M3/33:	. . . . . . [N: the dither being a random signal]
H03M3/332:	. . . . . . . [N: in particular a pseudo-random signal]
H03M3/334:	. . . . . . [N: the dither being at least partially dependent on the input signal]
H03M3/336:	. . . . . . [N: the dither being in the time domain]
H03M3/338:	. . . . . [N: by permutation in the time domain, e.g. dynamic element matching (in multiple bit sub-converters H03M1/06M7T3) ]
H03M3/34:	. . . . . . [N: by chopping]
H03M3/342:	. . . . . . [N: by double sampling, e.g. correlated double sampling]
H03M3/344:	. . . . [N: by filtering other than the noise-shaping inherent to delta-sigma modulators, e.g. anti-aliasing]
H03M3/346:	. . . . [N: by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases]
H03M3/348:	. . . . . [N: using return-to-zero signals]
H03M3/35:	. . . . [N: using redundancy]
H03M3/352:	. . . [N: of deviations from the desired transfer characteristic]
H03M3/354:	. . . . [N: at one point, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M3/478) ]
H03M3/356:	. . . . . [N: Offset or drift compensation (removal of offset already present on the analogue input signal H03M3/494) ]
H03M3/358:	. . . [N: of non-linear distortion, e.g. instability (avoiding instability by structural design H03M3/44) ]
H03M3/36:	. . . . [N: by temporarily adapting the operation upon detection of instability conditions]
H03M3/362:	. . . . . [N: in feedback mode, e.g. by reducing the order of the modulator]
H03M3/364:	. . . . . . [N: by resetting one or more loop filter stages]
H03M3/366:	. . . . . [N: in feed-forward mode, e.g. using look-ahead circuits]
H03M3/368:	. . . [N: of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators]
H03M3/37:	. . . . [N: Compensation or reduction of delay or phase error]
H03M3/372:	. . . . . [N: Jitter reduction]
H03M3/374:	. . . . . [N: Relaxation of settling time constraints, e.g. slew rate enhancement]
H03M3/376:	. . . . [N: Prevention or reduction of switching transients, e.g. glitches]
H03M3/378:	. . [N: Calibration or testing]
H03M3/38:	. . . [N: Calibration]
H03M3/382:	. . . . [N: at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M3/478) ]
H03M3/384:	. . . . . [N: Offset correction (removal of offset already present on the analogue input signal H03M3/494) ]
H03M3/386:	. . . . [N: over the full range of the converter, e.g. for correcting differential non-linearity]
H03M3/388:	. . . . . [N: by storing corrected or correction values in one or more digital look-up tables]
H03M3/39:	. . [N: Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators (of digital delta-sigma modulators H03M7/30B1)]
H03M3/392:	. . . [N: Arrangements for selecting among plural operation modes, e.g. for multi-standard operation]
H03M3/394:	. . . . [N: among different orders of the loop filter]
H03M3/396:	. . . . [N: among different frequency bands]
H03M3/398:	. . . . [N: among different converter types]
H03M3/40:	. . . [N: Arrangements for handling quadrature signals, e.g. complex modulators]
H03M3/402:	. . . [N: Arrangements specific to bandpass modulators]
H03M3/404:	. . . . [N: characterised by the type of bandpass filters used]
H03M3/406:	. . . . . [N: by the use of a pair of integrators forming a closed loop]
H03M3/408:	. . . . . [N: by the use of an LC circuit]
H03M3/41:	. . . . [N: combined with modulation to or demodulation from the carrier]
H03M3/412:	. . . [N: characterised by the number of quantisers and their type and resolution]
H03M3/414:	. . . . [N: having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type]
H03M3/416:	. . . . . [N: all these quantisers being multiple bit quantisers]
H03M3/418:	. . . . . [N: all these quantisers being single bit quantisers]
H03M3/42:	. . . . [N: having multiple quantisers arranged in parallel loops]
H03M3/422:	. . . . [N: having one quantiser only]
H03M3/424:	. . . . . [N: the quantiser being a multiple bit one]
H03M3/426:	. . . . . . [N: the quantiser being a successive approximation type analogue/digital converter]
H03M3/428:	. . . . . . [N: with lower resolution, e.g. single bit, feedback]
H03M3/43:	. . . . . [N: the quantiser being a single bit one]
H03M3/432:	. . . . . . [N: the quantiser being a pulse width modulation type analogue/digital converter, i.e. differential pulse width modulation]
H03M3/434:	. . . . . . [N: with multi-level feedback]
H03M3/436:	. . . characterised by the order of the loop filter, e.g. error feedback type
H03M3/438:	. . . . [N: the modulator having a higher order loop filter in the feedforward path]
H03M3/44:	. . . . . [N: with provisions for rendering the modulator inherently stable]
H03M3/442:	. . . . . . [N: by restricting the swing within the loop, e.g. gain scaling]
H03M3/444:	. . . . . . . [N: using non-linear elements, e.g. limiters]
H03M3/446:	. . . . . . [N: by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle, i.e. causing the modulator to operate in a chaotic regime]
H03M3/448:	. . . . . . . [N: by removing part of the zeroes, e.g. using local feedback loops]
H03M3/45:	. . . . . [N: with distributed feedforward inputs, i.e. with forward paths from the modulator input to more than one filter stage]
H03M3/452:	. . . . . [N: with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input]
H03M3/454:	. . . . . [N: with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage]
H03M3/456:	. . . . [N: the modulator having a first order loop filter in the feedforward path]
H03M3/458:	. . Analogue/digital converters using delta-sigma modulation as an intermediate step
H03M3/46:	. . . [N: using a combination of at least one delta-sigma modulator in series with at least one analogue/digital converter of a different type]
H03M3/462:	. . . [N: Details relating to the decimation process (decimation filters in general H03H17/04C, H03H17/06C) ]
H03M3/464:	. . . [N: Details of the digital/analogue conversion in the feedback path]
H03M3/466:	. . . [N: Multiplexed conversion systems]
H03M3/468:	. . . . [N: Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters]
H03M3/47:	. . . . . [N: using time-division multiplexing]
H03M3/472:	. . . . [N: Shared, i.e. using a single converter for multiple channels]
H03M3/474:	. . . . . [N: using time-division multiplexing]
H03M3/476:	. . . [N: Non-linear conversion systems]
H03M3/478:	. . . Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication
H03M3/48:	. . . . [N: characterised by the type of range control, e.g. limiting]
H03M3/482:	. . . . . [N: by adapting the quantisation step size]
H03M3/484:	. . . . . . [N: by adapting the gain of the feedback signal, e.g. by adapting the reference values of the digital/analogue converter in the feedback path]
H03M3/486:	. . . . . [N: by adapting the input gain]
H03M3/488:	. . . . [N: using automatic control]
H03M3/49:	. . . . . [N: in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values]
H03M3/492:	. . . . . [N: in feed forward mode, i.e. by determining the range to be selected directly from the input signal]
H03M3/494:	. . . [N: Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems (sample/hold circuits G11C27/02; sample rate conversion H03H17/04C, H03H17/06C) ]
H03M3/496:	. . . . [N: Details of sampling arrangements or methods]
H03M3/498:	. . . . . [N: Variable sample rate]
H03M3/50:	. . [N: Digital/analogue converters using delta-sigma modulation as an intermediate step (digital delta-sigma modulators per se H03M7/30B1) ]
H03M3/502:	. . . [N: Details of the final digital/analogue conversion following the digital delta-sigma modulation]
H03M3/504:	. . . . [N: the final digital/analogue converter being constituted by a finite impulse response [FIR] filter, i.e. FIRDAC]
H03M3/506:	. . . . [N: the final digital/analogue converter being constituted by a pulse width modulator]
H03M3/508:	. . . [N: Details relating to the interpolation process (interpolation filters in general H03H17/04C, H03H17/06C)]
H03M3/51:	. . . [N: Automatic control for modifying converter range]
H03M5/00:	Conversion of the form of the representation of individual digits
H03M5/02:	. Conversion to or from representation by pulses
H03M5/04:	. . the pulses having two levels
H03M5/06:	. . . Code representation, e.g. transition, for a given bit cell depending only on the information in that bit cell
H03M5/08:	. . . . Code representation by pulse width
H03M5/10:	. . . . Code representation by pulse frequency
H03M5/12:	. . . . Biphase level code, e.g. split phase code, Manchester code; Biphase space or mark code, e.g. double frequency code
H03M5/14:	. . . Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
H03M5/14B:	. . . . Conversion to or from block codes or representations thereof
H03M5/16:	. . the pulses having three levels
H03M5/18:	. . . two levels being symmetrical with respect to the third level, i.e. balanced bipolar ternary code
H03M5/20:	. . the pulses having more than three levels
H03M5/22:	. Conversion to or from representation by sinusoidal signals
H03M7/00:	Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits [M1207]
H03M7/00D:	. Conversion to or from differential modulation[N9503]
H03M7/00D2:	. . Conversion to or from delta modulation, i.e. one-bit differential modulation[N9503]
H03M7/00D2A:	. . . adaptive[N9503]
H03M7/00D4:	. . Conversion to or from differential modulation with several bits, i.e. the difference between successive samples being coded with more than one bit[N9503]
H03M7/00D4A:	. . . adaptive[N9503]
H03M7/00E:	. characterised by the elements used
H03M7/00E2:	. . using thin film devices
H03M7/00E3:	. . using superconductive devices
H03M7/00E4:	. . using magnetic elements, e.g. transfluxors
H03M7/00E5:	. . using semiconductor devices H03M7/00E7 takes precedence
H03M7/00E7:	. . using diodes
H03M7/00E8:	. . using resistive or capacitive elements
H03M7/00E9:	. . using opto-electronic devices
H03M7/02:	. Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word Booth encoders G06F7/52C2D1, G06F7/52C2D2A
H03M7/04:	. . the radix thereof being two
H03M7/06:	. . the radix thereof being a positive integer different from two
H03M7/08:	. . . the radix being ten, i.e. pure decimal code
H03M7/10:	. . the radix thereof being negative
H03M7/12:	. . having two radices, e.g. binary-coded-decimal code
H03M7/14:	. Conversion to or from non-weighted codes
H03M7/16:	. . Conversion to or from unit-distance codes, e.g. Gray code, reflected binary code
H03M7/16T:	. . . Conversion to or from thermometric code
H03M7/18:	. . Conversion to or from residue codes
H03M7/20:	. . Conversion to or from n-out-of-m codes number-of-one counters G06F7/60P
H03M7/22:	. . . to or from one-out-of-m codes
H03M7/24:	. . Conversion to or from floating-point codes
H03M7/26:	. Conversion to or from stochastic codes
H03M7/28:	. Programmable structures, i.e. where the code converter contains apparatus which is operator-changeable to modify the conversion process
H03M7/30:	. Compression ; Expansion; Suppression of unnecessary data, e.g. redundancy reduction for data acquisition G06F17/40; for image data processing G06T9/00; redundancy reduction in data recording G11B20/14; for transmission H04B1/66
H03M7/30B:	. . [N: Conversion to or from differential modulation]
H03M7/30B1:	. . . [N: Digital delta-sigma modulation]
H03M7/30B1C:	. . . . [N: Compensating for, or preventing of, undesired influence of physical parameters]
H03M7/30B1C2:	. . . . . [N: by averaging out the errors, e.g. using dither]
H03M7/30B1C4:	. . . . . [N: of non-linear distortion, e.g. by temporarily adapting the operation upon detection of instability conditions (avoiding instability by structural design H03M7/30B1S6H2)]
H03M7/30B1N:	. . . . [N: Non-linear modulators]
H03M7/30B1S:	. . . . [N: Structural details of digital delta-sigma modulators (H03M7/30B1C, H03M7/30B1N take precedence)]
H03M7/30B1S2:	. . . . . [N: Arrangements specific to bandpass modulators]
H03M7/30B1S4:	. . . . . [N: characterised by the number of quantisers and their type and resolution]
H03M7/30B1S4A:	. . . . . . [N: having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type]
H03M7/30B1S4C:	. . . . . . [N: having one quantiser only]
H03M7/30B1S4C2:	. . . . . . . [N: the quantiser being a multiple bit one]
H03M7/30B1S4C4:	. . . . . . . [N: the quantiser being a single bit one]
H03M7/30B1S6:	. . . . . characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
H03M7/30B1S6H:	. . . . . . [N: the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs]
H03M7/30B1S6H2:	. . . . . . . [N: with provisions for rendering the modulator inherently stable, e.g. by restricting the swing within the loop, by removing part of the zeroes using local feedback loops, by positioning zeroes outside the unit circle causing the modulator to operate in a chaotic regime]
H03M7/30B1S6H4:	. . . . . . . [N: with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input]
H03M7/30B1S6H6:	. . . . . . . [N: with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage]
H03M7/30B1S6Z:	. . . . . . [N: the modulator being of the error feedback type, i.e. having loop filter stages in the feedback path only]
H03M7/30B2:	. . . [N: Conversion to or from differential modulation with several bits only, i.e. the difference between successive samples being coded by more than one bit, e.g. differential pulse code modulation [DPCM] (H03M7/30B1 takes precedence; voice coding G10L19/00; image coding H04N7/26)]
H03M7/30B2A:	. . . . [N: adaptive, e.g. adaptive differential pulse code modulation [ADPCM]]
H03M7/30B4:	. . . [N: Conversion to or from one-bit differential modulation only, e.g. delta modulation [DM] (H03M7/30B1 takes precedence)]
H03M7/30B4A:	. . . . [N: adaptive, e.g. adaptive delta modulation [ADM]]
H03M7/30C:	. . Block-compounding PCM systems
H03M7/30D:	. . Conversion to or from Modulo-PCM
H03M7/30E:	. . [N: Distributed Source coding, e.g. Wyner-Ziv, Slepian Wolf]
H03M7/30L:	. . [N: Digital compression and data reduction techniques where the original information is represented by a subset or similar information, e.g. lossy compression]
H03M7/30L1:	. . . [N: Compressive sampling or sensing]
H03M7/30L2:	. . . [N: Segmenting]
H03M7/30M:	. . by means of a mask or a bit-map
H03M7/30P:	. . [N: Precoding preceding compression, e.g. Burrows-Wheeler transformation]
H03M7/30P1:	. . . Prediction
H03M7/30P1A:	. . . . Time
H03M7/30P1C:	. . . . Space
H03M7/30P3:	. . . Sorting
H03M7/30P5:	. . . Context modeling
H03M7/30V:	. . Vector coding for television signals, see H04N7/28
H03M7/30Z:	. . using adaptive string matching, e.g. the Lempel-Ziv method
H03M7/30Z1:	. . . employing a sliding window, e.g. LZ77
H03M7/30Z2:	. . . employing the use of a dictionary, e.g. LZ78
H03M7/30Z3:	. . . [N: Data deduplication]
H03M7/30Z3F:	. . . . [N: using fixed length segments]
H03M7/30Z3V:	. . . . [N: using variable length segments]
H03M7/30Z4:	. . . Grammar codes
H03M7/40:	. . Conversion to or from variable length codes, e.g. Shannon-Fano code, Huffman code, Morse code
H03M7/40A:	. . . Conversion to or from arithmetic code
H03M7/40A1:	. . . . [N: Binary arithmetic codes]
H03M7/40A1C:	. . . . . Context adapative binary arithmetic codes [CABAC ]
H03M7/40B:	. . . constant length to or from Morse code conversion
H03M7/40C:	. . . [N: Fixed length to variable length coding]
H03M7/40C1:	. . . . [N: Prefix coding]
H03M7/40C1A:	. . . . . [N: Adaptive prefix coding]
H03M7/40C1A1:	. . . . . . [N: Tree adaptation]
H03M7/40C1A2:	. . . . . . [N: Coding table selection]
H03M7/40C1A3:	. . . . . . [N: Coding table adaptation]
H03M7/40C1A4:	. . . . . . Parameterized codes
H03M7/40C1A4G:	. . . . . . . Golomb codes
H03M7/40C1S:	. . . . . [N: Static prefix coding]
H03M7/40C1T:	. . . . . Encoding of a tuple of symbols
H03M7/40V:	. . . [N: Variable length to variable length coding]
H03M7/42:	. . . using table look-up for the coding or decoding process, e.g. using read-only memory H03M7/40A takes precedence
H03M7/42D:	. . . . for the decoding process only
H03M7/46:	. . Conversion to or from run-length codes, i.e. by representing the number of consecutive digits, or groups of digits, of the same kind by a code word and a digit indicative of that kind
H03M7/48:	. . . alternating with other codes during the code conversion process, e.g. run-length coding being performed only as long as sufficientlylong runs of digits of the same kind are present
H03M7/50:	. . Conversion to or from non-linear codes, e.g. companding
H03M7/55:	. . [N: Compression Theory, e.g. compression of random number, repeated compression]
H03M7/60:	. . [N: General implementation details not specific to a particular type of compression]
H03M7/60D:	. . . [N: Decoder aspects]
H03M7/60E:	. . . [N: Encoder aspects]
H03M7/60F:	. . . [N: Methods or arrangements to increase the throughput]
H03M7/60F1:	. . . . [N: Parallelization]
H03M7/60F2:	. . . . [N: Pipelining]
H03M7/60H:	. . . [N: Handling of unkown probabilities]
H03M7/60K:	. . . [N: Compression optimized for errors]
H03M7/60M:	. . . [N: Power optimization with respect to the encoder, decoder, storage or transmission]
H03M7/60Q:	. . . [N: Synchronisation of encoder and decoder]
H03M7/60R:	. . . [N: Saving memory space in the encoder or decoder]
H03M7/60S:	. . . [N: Selection of Compressor]
H03M7/60S1:	. . . . [N: Selection between different types of compressors]
H03M7/60S3:	. . . . [N: Selection between compressors of the same type]
H03M7/60S5:	. . . . [N: Selection strategies]
H03M7/60S5D:	. . . . . [N: according to the data type]
H03M7/60S5F:	. . . . . [N: according to reasons other than compression rate and data type]
H03M7/70:	. . [N: Type of the data to be coded, other than image and sound]
H03M7/70A:	. . . [N: Software]
H03M7/70C:	. . . [N: Unicode]
H03M7/70E:	. . . [N: Structured documents, XML]
H03M9/00:	Parallel/series conversion or vice versa
H03M11/00:	Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
H03M11/00F:	. Phantom keys detection and prevention
H03M11/00N:	. Measures for preventing unauthorised decoding of keyboards
H03M11/02:	. Details
H03M11/04:	. . Coding of multifunction keys
H03M11/06:	. . . by operating the multifunction key itself in different ways
H03M11/08:	. . . . by operating selected combinations of multifunction keys
H03M11/10:	. . . . by methods based on duration or pressure detection of keystrokes
H03M11/12:	. . . . by operating a key a selected number of consecutive times whereafter a separate enter key is used which marks the end of the series
H03M11/14:	. . . by using additional keys, e.g. shift keys, which determine the function performed by the multifunction key
H03M11/16:	. . . . wherein the shift keys are operated after the operation of the multifunction keys
H03M11/18:	. . . . wherein the shift keys are operated before the operation of the multifunction keys
H03M11/20:	. Dynamic coding, i.e. by key scanning
H03M11/22:	. Static coding
H03M11/24:	. . using analogue means
H03M11/26:	. using opto-electronic means
H03M13/00:	Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
H03M13/00H:	. using punctured codes
H03M13/01:	. Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
H03M13/01T:	. . Simulation or testing of codes, e.g. bit error rate [BER measurements]
H03M13/03:	. Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
H03M13/03T:	. . Theoretical methods to calculate these checking codes
H03M13/03T1:	. . . Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
H03M13/42A:	. . . .  Correction factor, e.g. approximations of the exp(1+x) function
H03M13/42B:	. . . .  For block codes using a trellis or lattice
H03M13/42C:	. . . .  ACS in forward or backward recursions
H03M13/42L:	. . . .  LLR computation by combination of forward and backward metrics into LLRs
H03M13/42P:	. . . .  Decoding in probability domain
H03M13/42T:	. . . .  Tail-biting (H03M13/29T8 takes precedence)
H03M13/05:	. . using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits H03M13/29B takes precedence
H03M13/07:	. . . Arithmetic codes
H03M13/09:	. . . Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit error detection or correction by redundancy in data representation G06F11/08
H03M13/09B:	. . . . Parallel or block-wise CRC computation
H03M13/09D:	. . . . CRC update after modification of the information word
H03M13/09F:	. . . . Error detection codes other than CRC and single parity bit codes
H03M13/09F1:	. . . . . Checksums
H03M13/09S:	. . . . using single parity bit
H03M13/11:	. . . using multiple parity bits
H03M13/11L:	. . . . Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC codes]
H03M13/11L1:	. . . . . Decoding
H03M13/11L1B:	. . . . . . Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
H03M13/11L1D:	. . . . . . Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
H03M13/11L1D1:	. . . . . . . Merged schedule message passing algorithm with storage of sums of check-to-bit node messages or sums of bit-to-check node messages, e.g. in order to increase the memory efficiency
H03M13/11L1D3:	. . . . . . . using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
H03M13/11L1D3C:	. . . . . . . . with correction functions for the min-sum rule, e.g. using an offset or a scaling factor
H03M13/11L1D3S:	. . . . . . . . storing only the first and second minimum values per check node
H03M13/11L1D5:	. . . . . . . using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs
H03M13/11L1I:	. . . . . . Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
H03M13/11L1S:	. . . . . . Scheduling of bit node or check node processing
H03M13/11L1S1:	. . . . . . . Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
H03M13/11L1S3:	. . . . . . . Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
H03M13/11L1S5:	. . . . . . . Shuffled, staggered, layered or turbo decoding schedules
H03M13/11L1T:	. . . . . . using trapping sets
H03M13/11L1W:	. . . . . . Pipelined decoding at code word level, e.g. multiple code words being decoded simultaneously
H03M13/11L3:	. . . . . Structural properties of the code parity-check or generator matrix
H03M13/11L3A:	. . . . . . Algebraically constructed LDPC codes, e.g. LDPC codes derived from Euclidean geometries [EG-LDPC codes ]
H03M13/11L3C:	. . . . . . Low-density parity-check convolutional codes [LDPC-CC ]
H03M13/11L3D:	. . . . . . Low-density generator matrices [LDGM ]
H03M13/11L3E:	. . . . . . Quasi-cyclic LDPC [QC-LDPC codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices]
H03M13/11L3E1:	. . . . . . . Array based LDPC codes, e.g. array codes
H03M13/11L3E5:	. . . . . . . QC-LDPC codes as defined for the digital video broadcasting [DVB specifications, e.g. DVB-Satellite [DVB-S2]]
H03M13/11L3E7:	. . . . . . . wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
H03M13/11L3N:	. . . . . . Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
H03M13/11L3P:	. . . . . . Parity-check or generator matrices built from sub-matrices representing known block codes such as e.g. Hamming codes, e.g. generalized LDPC codes
H03M13/11L3R:	. . . . . . Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
H03M13/11L3T:	. . . . . . Parity check matrix structured for simplifying encoding , e.g. by having a triangular or an approximate triangular structure H03M13/11L3E5 takes precedence
H03M13/11L3T1:	. . . . . . . wherein the structure of the parity-check matrix is obtained by reordering of a random parity-check matrix
H03M13/11L3T3:	. . . . . . . wherein the parity-check matrix comprises a part with a double-diagonal
H03M13/11L3T3A:	. . . . . . . . wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
H03M13/11L7:	. . . . . Codes on graphs other than LDPC codes
H03M13/11L7R:	. . . . . . Repeat-accumulate [RA codes]
H03M13/11L7R1:	. . . . . . . Irregular repeat-accumulate [IRA codes]
H03M13/13:	. . . Linear codes
H03M13/13A:	. . . . Algebraic geometric codes, e.g. Goppa codes
H03M13/13M:	. . . . Non-binary linear block codes not provided for otherwise
H03M13/13R:	. . . . Reed-Muller [RM codes]
H03M13/13Z:	. . . . Codes linear in a ring, e.g. Z4-linear codes or Nordstrom-Robinson codes
H03M13/15:	. . . . Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem (BCH) codes
H03M13/15G:	. . . . . Golay Codes
H03M13/15P:	. . . . . using error location or error correction polynomials
H03M13/15P1:	. . . . . . Reed-Solomon codes
H03M13/15P11:	. . . . . . Polynomial evaluation, i.e. determination of a polynomial sum at a given value
H03M13/15P13:	. . . . . . Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance
H03M13/15P14:	. . . . . . Finite field arithmetic processing methods or arrangements for finite field arithmetic G06F7/72
H03M13/15P15:	. . . . . . Determination of error values
H03M13/15P2:	. . . . . . Bose-Chaudhuri-Hocquenghem [BCH codes]
H03M13/15P3:	. . . . . . Determination and particular use of error location polynomials
H03M13/15P3B:	. . . . . . . using the Berlekamp-Massey algorithm
H03M13/15P3E:	. . . . . . . using the Euclid algorithm
H03M13/15P4:	. . . . . . Error and erasure correction, e.g. by using the error and erasure locator or Forney polynomial
H03M13/15P5:	. . . . . . Determination of error locations, e.g. Chien search or other methods or arrangements for the determination of the roots of the error locator polynomial
H03M13/15P6:	. . . . . . Shortening or extension of codes
H03M13/15P7:	. . . . . . Pipelined decoder implementations
H03M13/15P8:	. . . . . . Encoding or decoding using time-frequency transformations, e.g. fast Fourier transformation
H03M13/15P9:	. . . . . . Decoding beyond the bounded minimum distance [BMD ]
H03M13/15R:	. . . . . Remainder calculation, e.g. for encoding and syndrome calculation
H03M13/15R1:	. . . . . . Parallel or block-wise remainder calculation
H03M13/17:	. . . . Burst error correction, e.g. error trapping, Fire codes
H03M13/17T:	. . . . . Error trapping or Fire codes
H03M13/19:	. . . . Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
H03M13/21:	. . . Non-linear codes, e.g. m-bit data word to n-bit code word (mBnB) conversion with error detection or error correction
H03M13/23:	. . using convolutional codes, e.g. unit memory codes
H03M13/23E:	. . . Encoding of convolutional codes, e.g. methods or arrangements for parallel or block-wise encoding
H03M13/25:	. Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
H03M13/25B:	. . with block coding
H03M13/25C:	. . with concatenated codes
H03M13/25L:	. . with Low Density Parity Check (LDPC) codes
H03M13/25T:	. . with trellis coding, e.g. with convolutional codes and TCM
H03M13/25V:	. . with turbo codes, e.g. Turbo Trellis Coded Modulation (TTCM)
H03M13/27:	. using interleaving techniques
H03M13/27A:	. . the interleaver involving at least two directions
H03M13/27A1:	. . . Simple row-column interleaver, i.e. pure block interleaving
H03M13/27A2:	. . . Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
H03M13/27A2G:	. . . . Turbo interleaver for 3rd generation partnership project [3GPP universal mobile telecommunications systems [UMTS], e.g. as defined in technical specification TS 25.212]
H03M13/27A3:	. . . the interleaver involves 3 or more directions
H03M13/27A4:	. . . the interleaver involves a diagonal direction, e.g. by using an interleaving matrix with read-out in a diagonal direction
H03M13/27A5:	. . . Turbo interleaver for 3rd generation partnership project 2 [3GPP2 mobile telecommunication systems, e.g. as defined in the 3GPP2 technical specifications C.S0002]
H03M13/27A6:	. . . Helical type interleaver
H03M13/27C:	. . Convolutional interleaver; Interleavers using shift-registers or delay lines like e.g. Ramsey type interleaver
H03M13/27G:	. . Interleaver using powers of a primitive element, e.g. Galois field [GF interleaver]
H03M13/27H:	. . Permutation polynomial interleaver, e.g. quadratic permutation polynomial [QPP interleaver and quadratic congruence interleaver]
H03M13/27I:	. . Irregular interleaver wherein the permutation pattern is not obtained by a computation rule, e.g. interleaver based on random generators
H03M13/27I1:	. . . S-random interleaver
H03M13/27M:	. . Interleaver wherein the permutation pattern is obtained using a congruential operation of the type y=ax+b modulo c
H03M13/27M1:	. . . Almost regular permutation [ARP interleaver]
H03M13/27N:	. . Interleaver with an interleaving rule not provided for in the subgroups H03M13/27A-H03M13/27M1
H03M13/27O:	. . Interleaving address generation
H03M13/27O1:	. . . Circuits therefore
H03M13/27P:	. . Interleaver wherein the permutation pattern or a portion thereof is stored
H03M13/27T:	. . Internal interleaver for turbo codes H03M13/27A2G and H03M13/27A5 take precedence
H03M13/27T1:	. . . Contention or collision free turbo code internal interleaver
H03M13/27U:	. . Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
H03M13/27W:	. . Interleaver implementations, which reduce the amount of required interleaving memory
H03M13/27W1:	. . . Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
H03M13/27X:	. . Interleaver providing variable interleaving, e.g. variable block sizes
H03M13/27Z:	. . Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
H03M13/27Z1:	. . . Two or more interleaving operations are performed jointly, e.g. the first and second interleaving operations defined for 3GPP UMTS are performed jointly in a single interleaving operation
H03M13/29:	. combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
H03M13/29A:	. . Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
H03M13/29B:	. . using block codes H03M13/29T takes precedence
H03M13/29B3:	. . . Product codes
H03M13/29B3A:	. . . . omitting parity on parity
H03M13/29B3D:	. . . . with an error detection code in one dimension
H03M13/29B5:	. . . with error correction codes in three or more dimensions, e.g. 3-dimensional product code where the bits are arranged in a cube
H03M13/29B7:	. . . wherein error correction coding involves a diagonal direction
H03M13/29B7C:	. . . . Cross interleaved Reed-Solomon codes [CIRC ]
H03M13/29B9:	. . . Decoding strategies
H03M13/29B9E:	. . . . with erasure setting
H03M13/29C:	. . using a block and a convolutional code H03M13/29T takes precedence
H03M13/29C3:	. . . comprising an outer Reed-Solomon code and an inner convolutional code
H03M13/29D:	. . using convolutional codes H03M13/29T takes precedence
H03M13/29E:	. . wherein a block of parity bits is computed only from combined information bits or only from parity bits, e.g. a second block of parity bits is computed from a first block of parity bits obtained by systematic encoding of a block of information bits, or a block of parity bits is obtained by an XOR combination of sub-blocks of information bits
H03M13/29F:	. . using at least three error correction codes H03M13/29T takes precedence
H03M13/29M:	. . Iterative decoding H03M13/29T takes precedence
H03M13/29M1:	. . . using iteration stopping criteria
H03M13/29P:	. . using Picket codes or other codes providing error burst detection capabilities, e.g. burst indicator codes and long distance codes [LDC ]
H03M13/29T:	. . Turbo codes and decoding
H03M13/29T1:	. . . Particular turbo code structure
H03M13/29T1B:	. . . . [N: Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes]
H03M13/29T1C:	. . . . [N: Turbo codes concatenated with another code, e.g. an outer block code]
H03M13/29T1N:	. . . . [N: Non-binary turbo codes]
H03M13/29T1S:	. . . . [N: Serial concatenation using convolutional component codes]
H03M13/29T3:	. . . [N: Judging correct decoding, e.g. iteration stopping criteria (stopping criteria for iterative decoding, see also H04L1/00B5T1)]
H03M13/29T4:	. . . [N: Particular arrangement of the component decoders]
H03M13/29T4A:	. . . . [N: using as many component decoders as component codes]
H03M13/29T4L:	. . . . [N: using less component decoders than component codes, e.g. multiplexed decoders and scheduling thereof]
H03M13/29T4M:	. . . . [N: using more component decoders than component codes, e.g. pipelined turbo iterations]
H03M13/29T5:	. . . [N: Turbo codes with short blocks]
H03M13/29T7:	. . . [N: Implementing the return to a predetermined state, i.e. trellis termination]
H03M13/29T8:	. . . [N: Tail biting]
H03M13/31:	. combining coding for error detection or correction and efficient use of the spectrum
H03M13/33:	. Synchronisation based on error coding or decoding for transmission H04L7/04C
H03M13/33F:	. . Synchronisation on a multi-bit block basis, e.g. frame synchronisation
H03M13/33P:	. . Phase recovery
H03M13/35:	. Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
H03M13/35A:	. . Adaptation to the channel
H03M13/35U:	. . Unequal error protection [UEP ]
H03M13/37:	. Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 to H03M13/35
H03M13/37A:	. . Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
H03M13/37A1:	. . . Adaptation to the number of estimated errors or to the channel state
H03M13/37D:	. . using means or methods for the initialisation of the decoder
H03M13/37E:	. . with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes
H03M13/37J:	. . with judging correct decoding
H03M13/37K:	. . with iterative decoding
H03M13/37K1:	. . . using iteration stopping criteria
H03M13/37M:	. . using code combining, i.e. using combining of codeword portions which may have been transmitted separately, e.g. Digital Fountain codes, Raptor codes or Luby Transform [LT codes] [M1207]
H03M13/37N:	. . using symbol combining, e.g. Chase combining of symbols received twice or more
H03M13/37R:	. . using a re-encoding step during the decoding process
H03M13/37S:	. . for soft-output decoding of block codes
H03M13/37U:	. . [N. for decoding of real number codes]
H03M13/39:	. . Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
H03M13/39A:	. . . [N: Maximum a posteriori probability (MAP) decoding and approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding; MAP decoding also to be found in H04L1/00B5M]
H03M13/39A1:	. . . . [N: Correction factor, e.g. approximations of the exp(1+x) function]
H03M13/39A3:	. . . . [N: for block codes using a trellis or lattice]
H03M13/39A5:	. . . . [N: Add-Compare-Select (ACS) operation in forward or backward recursions]
H03M13/39A6:	. . . . [N: Log-Likelihood Ratio (LLR) computation by combination of forward and backward metrics into LLRs]
H03M13/39A8:	. . . . [N: Decoding in probability domain]
H03M13/39A9:	. . . . [N: Tail-biting (H03M13/29T8 takes precedence)]
H03M13/39B:	. . . for block codes, especially trellis or lattice decoding thereof
H03M13/39C:	. . . 2
H03M13/39D:	. . . using a trellis with a reduced state space complexity, e.g. M-algorithm or T-algorithm [M1207]
H03M13/39M:	. . . Arrangements of methods for branch or transition metric calculation
H03M13/39P:	. . . based on architectures providing a highly parallelized implementation, e.g. based on systolic arrays
H03M13/39R:	. . . using sliding window techniques or parallel windows
H03M13/39S:	. . . using sequential decoding, e.g. the Fano or stack algorithms
H03M13/39T:	. . . for non-binary convolutional codes
H03M13/39U:	. . . 1, obtained by convolutional encoders with k inputs and n outputs
H03M13/39V:	. . . using state pinning or decision forcing, i.e. the decoded sequence is forced through a particular trellis state or a particular set of trellis states or a particular decoded symbol
H03M13/41:	. . . using the Viterbi algorithm or Viterbi processors
H03M13/41A:	. . . . implementing add, compare, select (ACS) operations
H03M13/41L:	. . . . list output Viterbi decoding
H03M13/41P:	. . . . implementing the return to a predetermined state
H03M13/41Q:	. . . . tail biting Viterbi decoding
H03M13/41S:	. . . . soft-output Viterbi algorithm based decoding, i.e. Viterbi decoding with weighted decisions
H03M13/41S1:	. . . . . soft-output Viterbi decoding according to Battail and Hagenauer in which the soft-output is determined using path metric differences along the maximum-likelihood path, i.e. "SOVA" decoding
H03M13/41S1A:	. . . . . . two-step SOVA decoding, i.e. the soft-output is determined by a second traceback operation after the determination of the hard decision like in the Berrou decoder
H03M13/41T:	. . . . implementing path management
H03M13/41T1:	. . . . . using traceback H03M13/41T3 takes precedence
H03M13/41T1P:	. . . . . . using a plurality of RAMs, e.g. for carrying out a plurality of traceback implementations simultaneously
H03M13/41T2:	. . . . . using register-exchange H03M13/41T3 takes precedence
H03M13/41T3:	. . . . . using combined traceback and register-exchange
H03M13/42:	. . . MAP decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding see also H04L1/00B5M
H03M13/43:	. . Majority logic or threshold decoding
H03M13/45:	. . Soft decoding, i.e. using symbol reliability information
H03M13/45C:	. . . using a set of candidate code words, e.g. ordered statistics decoding [OSD ]
H03M13/45C1:	. . . . wherein the candidate code words are obtained by an algebraic decoder, e.g. Chase decoding
H03M13/45C1G:	. . . . . using a set of erasure patterns or successive erasure decoding, e.g. generalized minimum distance [GMD decoding]
H03M13/45C2:	. . . . wherein all the code words of the code or its dual code are tested, e.g. brute force decoding
H03M13/45L:	. . . by updating bit probabilities or hard decisions in an iterative fashion for convergence to a final decoding result
H03M13/47:	. Error detection, forward error correction or error protection, not provided for in groups H03M13/01 to H03M13/37
H03M13/49:	. . Unidirectional error detection or correction
H03M13/51:	. . Constant weight codes; n-out-of-m codes; Berger codes
H03M13/53:	. . Codes using Fibonacci numbers series
H03M13/61:	. Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
H03M13/61A:	. . Specific encoding aspects, e.g. encoding by means of decoding
H03M13/61C:	. . Aspects specific to channel or signal-to-noise ratio estimation H03M13/63 takes precedence
H03M13/61D:	. . Use of the dual code
H03M13/61M:	. . Use of computational or mathematical techniques
H03M13/61M1:	. . . Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
H03M13/61M2:	. . . Polynomial operations, e.g. operations related to generator polynomials or parity-check polynomials
H03M13/61S:	. . Shortening and extension of codes
H03M13/63:	. Joint error correction and other techniques H03M13/31 and H03M13/33 take precedence
H03M13/63A:	. . Error control coding in combination with Automatic Repeat reQuest [ARQ and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy ]
H03M13/63C:	. . Error control coding in combination with data compression
H03M13/63C1:	. . . using variable length codes
H03M13/63D:	. . Error control coding in combination with demodulation
H03M13/63E:	. . Error control coding in combination with equalisation
H03M13/63F:	. . Error control coding in combination with channel estimation
H03M13/63P:	. . Error control coding in combination with techniques for partial response channels, e.g. recording
H03M13/63R:	. . Error control coding in combination with rate matching
H03M13/63R1:	. . . by repetition or insertion of dummy data, i.e. rate reduction
H03M13/63R2:	. . . by puncturing
H03M13/63R2R:	. . . . using rate compatible puncturing or complementary puncturing
H03M13/63R2R1:	. . . . . Rate compatible punctured convolutional [RCPC codes]
H03M13/63R2R2:	. . . . . Rate compatible punctured turbo [RCPT codes]
H03M13/63R2R3:	. . . . . Complementary punctured convolutional [CPC codes]
H03M13/63R2R4:	. . . . . Rate compatible low-density parity check [LDPC codes]
H03M13/65:	. Purpose and implementation aspects
H03M13/65D:	. . Reduction of hardware complexity or efficient processing
H03M13/65D1:	. . . Memory efficient implementations
H03M13/65F:	. . Flexibility, adaptability, parametrability and configurability of the implementation
H03M13/65F1:	. . . Support of multiple decoding rules, e.g. combined MAP and Viterbi decoding
H03M13/65F2:	. . . Support of multiple code types, e.g. unified decoder for LDPC and turbo codes
H03M13/65F3:	. . . Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
H03M13/65F4:	. . . Support of multiple transmission or communication standards
H03M13/65K:	. . Intended application, e.g. transmission or communication standard
H03M13/65K1:	. . . 3GPP LTE including E-UTRA
H03M13/65K10:	. . . UWB OFDM
H03M13/65K11:	. . . DVB-T2
H03M13/65K12:	. . . DVB-C2
H03M13/65K13:	. . . 3GPP2
H03M13/65K2:	. . . IEEE 802.11 (WLAN)
H03M13/65K3:	. . . 3GPP HSDPA, e.g. HS-SCCH or DS-DSCH related
H03M13/65K4:	. . . ITU 992.X (ADSL)
H03M13/65K5:	. . . GSM GPRS
H03M13/65K6:	. . . ATSC VBS systems
H03M13/65K7:	. . . DVB-H and DVB-M
H03M13/65K8:	. . . IEEE 802.16 (WIMAX and broadband wireless access)
H03M13/65K9:	. . . TCP, UDP, IP and associated protocols, e.g. RTP
H03M13/65L:	. . Parallelized implementations
H03M13/65M:	. . Implementations using multi-port memories
H03M13/65N:	. . Implementations concerning memory access contentions
H03M13/65P:	. . Implementation on processors, e.g. DSPs, or software implementations
H03M13/65Q:	. . Implementations using a tree structure, e.g. implementations in which the complexity is reduced by a tree structure from O(n) to O(log(n))
H03M13/65R:	. . Implementations based on combinatorial logic, e.g. boolean circuits
H03M13/65V:	. . Representation or format of variables, register sizes or word-lengths and quantization
H03M13/65V1:	. . . Scaling by multiplication or division
H03M13/65V2:	. . . Normalization other than scaling, e.g. by subtraction
H03M13/65V2M:	. . . . Modulo/modular normalization, e.g. 2's complement modulo implementations
H03M13/65V3:	. . . Compression or short representation of variables
H03M13/65V4:	. . . Truncation, saturation and clamping
H03M13/65V5:	. . . Non-linear quantization
H03M13/65W:	. . Implementations using analogue techniques for coding or decoding, e.g. analogue Viterbi decoder
H03M99/00:	Subject matter not provided for in other groups of this subclass